Enabling Programmer-controlled Combined Memory Consistency for Parallel Code Optimization

Enabling Programmer-controlled Combined Memory Consistency for Parallel Code Optimization

Website or Online Data - 2003
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In this report, a novel software technique is presented that provides the capability to guarantee a different memory consistency model for different variables within the same shared memory parallel program. Programmers need only focus on their parallel algorithm and which variables can tolerate the use of old values, while the technique automatically guarantees sequential consistency for all remaining variables and identifies where unnecessary synchronization overhead can be avoided. Program slicing is exploited to address the interactions between variables that can tolerate old values and those that require the most recent value to be read.
Publisher: Aberdeen Proving Ground, MD : Army Research Laboratory, [2003]
Characteristics: 1 online resource (iv, 17 p.) : ill
Additional Contributors: U.S. Army Research Laboratory

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